A Control-Theoretic Approach to Scheduling of Semiconductor Fabrication Processes

K.S. Tsakalis and D.E. Rivera

Supported by the INTEL Research Council
INTEL Sponsor: Karl Kempf

In close collaboration with A.A. Rodriguez and M. Kawski; see Modelling and Robust Control of Re-Entrant Semiconductor Fabrication Facilities: Design of Low-Level Decision Policies 


The objective of this project is to employ systematic methods from systems and control theory in the modeling, analysis and controller design for the scheduling of semiconductor manufacturing operations. A key component is the understanding of the scheduling problem complexity induced by presence of nonlinear dynamics (re-entry, batching, machine set-ups, multiple products, preventive maintenance etc.)

The basic framework of our modeling and controller design approach is the natural time-scale decomposition associated with the various decision levels. At a fast time-scale, decisions are made regarding the assignment of resources, operation of individual machines, release of material into the production line, maintenance etc. At a slower time-scale, one is concerned with the average characteristics of production and the overall optimization of the fab operation. An advantage of this modeling approach lies in its ability to bring in control-theoretic concepts of uncertainty description, model aggregation, assessment of closed-loop model fidelity etc. Furthermore, the decomposition of the control problem in terms of slow and fast time-scales can allow for a scalable and more efficient exploitation of structural system properties. Inner-loop controllers, operating on a fast time-scale, can take into account the process nonlinear dynamics and define operating trajectories that trade-off variability minimization, cycle-time minimization and throughput maximization in a locally optimal way. On the other hand, outer-loop controllers operate in a slow time-scale and can optimize the average production behavior more efficiently, by taking into account low-frequency variabilities, e.g., preventive maintenance.

The focus of this project is on the design of outer-loop scheduling policies (slow time-scales) while inner-loop (fast time-scale) considerations are addressed in the related project.


  • "Hierarchical Modeling and Control of Re-Entrant Semiconductor Manufacturing Facilities," Proc. 35th CDC, Kobe, Dec. 1996, with M.K. ElAdl, A.A. Rodriguez.
  • "Hierarchical Modeling and Control  of Re-Entrant Semiconductor Fabrication Lines: A Mini-Fab Benchmark," 6th IEEE Intl. Conf. on Emerging Technologies and Factory Automation, 508--513, Los Angeles, Sept.1997, with J.J. Flores-Godoy and A.A. Rodriguez.

    Some related results in:
    J.J. Flores-Godoy, Y. Wang, D.W. Collins, F. Hoppensteadt and K. Tsakalis, �A Mini-Fab Simulation Model comparing FIFO and MIVP schedule policies (outer loop) and PID and H-infinity machine controllers (inner loop) for semiconductor diffusion bay maintenance,� IECON�98, 24th Annual Conf., IEEE Indust. Elec. Soc., Aachen, Sept. 1998.

    The Team ( Kawski,  Rivera, Rodriguez and Tsakalis + students)  and the Problem (click for a description and some results)